RT Journal Article
JF 2007 16th International Conference on Parallel Architectures and Compilation Techniques
YR 2007
VO 00
SP 424
TI Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation
A1 Sule Ozev,
A1 Michael E. Bauer,
A1 Bogdan F. Romanescu,
A1 Daniel J. Sorin,
K1 null
AB A major problem facing the computer and semi-conductor industries is the increasing amount of CMOS process variability [1, 3]. Variability in low-level circuit parameters, such as transistor gate length and gate oxide thickness, complicates system design by introducing uncertainty about how a fabricated system will perform. Although a circuit or chip is designed to run at a nominal clock frequency, the fabricated implementation may vary far from this expected performance.
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 1089-795X
LA English
DO 10.1109/PACT.2007.59
LK http://doi.ieeecomputersociety.org/10.1109/PACT.2007.59