RT Journal Article
JF Parallel Algorithms / Architecture Synthesis, AIZU International Symposium on
YR 1997
VO 00
IS
SP 31
TI The Architecture of Massively Parallel Processor CP-PACS
A1 Hiroshi Nakamura,
A1 Yoichi IwasakiI,
A1 Taisuke Boku,
A1 Kisaburo Nakazawa,
K1
AB CP-PACS (Computational Physics by Parallel Array Computer System) is a massively parallel processor with 2048 Processing Units built at Center for Computational Physics, University of Tsukuba. The node processor of CP-PACS is a RISC microprocessor enhanced by Psuedo Vector Processing feature, which can realize high-performance vector processing. The interconnection network is 3-dimensional Hyper-Crossbar Network, which has high flexibility and embeddability for various network topologies and communication patterns. The theoretical peak performance of whole system is 614.4 GFLOPS. In this paper, we describe the overview of CP-PACS architecture and several special architectural characteristics of it. The performance evaluation on parallel LINPACK benchmark is also shown.
PB IEEE Computer Society, [URL:http://www.computer.org]
SN
LA English
DO 10.1109/AISPAS.1997.581622
LK http://doi.ieeecomputersociety.org/10.1109/AISPAS.1997.581622