RT Journal Article
JF IEEE Transactions on Parallel & Distributed Systems
YR 2002
VO 13
IS
SP 1320
TI Integrated Performance Models for SPMD Applications and MIMD Architectures
A1 Claudio Gennaro,
A1 Paolo Cremonesi,
K1 Single program multiple data (SPMD)
K1 multiple instruction multiple data (MIMD)
K1 performance model
K1 queuing network model
K1 fork-join queues
K1 mean value analysis (MVA)
K1 parallel I/O
K1 synchronization overhead
K1 speedup surface.
AB <p><b>Abstract</b>—This paper introduces queuing network models for the performance analysis of SPMD applications executed on general-purpose parallel architectures such as MIMD and clusters of workstations. The models are based on the pattern of computation, communication, and I/O operations of typical parallel applications. Analysis of the models leads to the definition of speedup surfaces which capture the relative influence of processors and I/O parallelism and show the effects of different hardware and software components on the performance. Since the parameters of the models correspond to measurable program and hardware characteristics, the models can be used to anticipate the performance behavior of a parallel application as a function of the target architecture (i.e., number of processors, number of disks, I/O topology, etc).</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 1045-9219
LA English
DO 10.1109/TPDS.2002.1158268
LK http://doi.ieeecomputersociety.org/10.1109/TPDS.2002.1158268