RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS 6
SP 1
TI Departments [Table of Contents]K1 2010 November-December 2010
K1 IEEE Design and Test Table of Contents

AB IEEE Design and Test Table of Contents November December 2010
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.130
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.130

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 3
TI Call for Papers
K1 IEEE Design and Test Call for Papers
K1 Design and test of flexible electronics
AB IEEE Design and Test Call for Papers for November/December 2011
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.127
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.127

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 4
TI Guest Editors' Introduction: Managing Uncertainty through Postfabrication Calibration and Repair
A1 Swarup Bhunia,
A1 Rahul Rao,
K1 design and test
K1 built-in self-repair
K1 calibration
K1 many-core
K1 multicore
K1 postsilicon optimization
K1 reliability
K1 self-repair
K1 thermal management
K1 yield improvement
AB <p>This special issue presents six articles that highlight challenges, and approaches toward improving, design yield and reliability through postsilicon optimizations. The articles cover postsilicon adaptation and repair issues in a wide range of areas including analog circuits, embedded memories, and multicore systems.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.134
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.134

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 2
TI Increasing yield and reliability through postsilicon tuning
A1 Krishnendu Chakrabarty,
K1 design and test
K1 calibration and repair
K1 low-power
K1 mixed-signal
K1 postsilicon tuning
K1 parameter variation
K1 process variation
K1 yield and reliability
AB <p>This issue of <it>D&#x0026;T</it> features six articles on postsilicon calibration and repair. The articles span both design and test aspects of chip and system design, and highlight the interplay between design and test solutions.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.135
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.135

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 36
TI The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane
A1 Rajiv Joshi,
A1 Yuen Chan,
A1 Rouwaida Kanj,
A1 Arthur tuminaro,
A1 Anthony Pelella,
K1 design and test
K1 DFM
K1 memory
K1 logic
K1 yield
K1 test
K1 variation-tolerant designs
AB <p><it>Editor's note:</it></p><p>Statistical approaches for yield estimation and robust design are vital in the current variation-dominated design era. This article presents a mixture importance sampling methodology to enable yield-driven design and extends its application beyond memories to peripheral circuits and logic blocks.</p><p align="right"><it>&#x2014;Rahul Rao, IBM</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.95
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.95

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 58
TI Runtime Thermal Management Using Software Agents for Multi- and Many-Core Architectures
A1 Mohammad Al Faruque,
A1 Joerg Henkel,
A1 Janmartin Jahn,
K1 design and test
K1 multicore
K1 single-chip multiprocessors
K1 hardware reliability
K1 adaptable architectures
K1 on-chip interconnection networks
K1 distributed systems
K1 multiagent systems
AB <p><it>Editor's note:</it></p><p>System-level runtime approaches provide a new dimension of variation tolerance in multi- and many-core systems. This article looks into a scalable system-level, dynamic thermal management solution using an agent-based, distributed-application-mapping approach.</p><p align="right"><it>&#x2014;Swarup Bhunia, Case Western Reserve University</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.94
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.94

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 6
TI Analog Signature- Driven Postmanufacture Multidimensional Tuning of RF Systems
A1 Ganesh Srinivasan,
A1 Shreyas Sen,
A1 Friedrich Taenzler,
A1 Vishwanath Natarajan,
A1 Aritra Banerjee,
A1 Abhijit Chatterjee,
K1 design and test
K1 RF system
K1 submicron technology
K1 process variation
K1 yield improvement
K1 self tuning
K1 postmanufacture tuning
K1 analog tuning
K1 optimization
K1 tuning knobs
K1 manufacturing cost
AB <p><it>Editor's note:</it></p><p>Tuning knobs are becoming common in analog and RF devices for postsilicon calibration for variation tolerance and compensation. This article presents a low-cost, hardware-iterative technique based on a steepest-descent-based gradient search algorithm and demonstrates its utility in performance tuning of a 2.4-GHz transmitter system.</p><p align="right"><it>&#x2014;Rahul Rao, IBM</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.123
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.123

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 18
TI Self-Healing Phase-Locked Loops in Deep-Scaled CMOS Technologies
A1 Wu-Hsin Chen,
A1 Byunghoo Jung,
K1 design and test
K1 phase-locked loop
K1 self-healing
K1 noise control
K1 automatic amplitude control
K1 digital-feedback control
K1 yield improvement
AB <p><it>Editor's note:</it></p><p>Despite their inherent self-healing nature, noise (jitter) in phase-locked loops is sensitive to process and environmental variation. This article discusses automatic frequency calibration and amplitude control techniques that rely on a negative feedback loop with a large emphasis on digitally assisted calibration.</p><p align="right"><it>&#x2014;Rahul Rao, IBM</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.138
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.138

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 26
TI Postsilicon Adaptation for Low-Power SRAM under Process Variation
A1 Jason Schlessman,
A1 Saibal Mukhopadhyay,
A1 Minki Cho,
A1 Marilyn Wolf,
A1 Hamid Mahmoodi,
K1 design and test
K1 low-power
K1 multimedia
K1 SRAM
K1 reconfiguration
K1 process variations
K1 image processing
K1 postsilicon adaptation
AB <p><it>Editor's note:</it></p><p>Due to the high density requirement for embedded memories, such memories are highly vulnerable to process variation&#x2013;induced failures. A conservative design approach can largely affect memory density and access performance. This article analyzes variation effects in SRAM and presents low-cost, adaptive postsilicon repair mechanisms.</p><p align="right"><it>&#x2014;Swarup Bhunia, Case Western Reserve University</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.137
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.137

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 46
TI A Built-in Method to Repair SoC RAMs in Parallel
A1 Jin-Fu Li,
A1 Chih-Sheng Hou,
A1 Tsu-Wei Tseng,
K1 design and test
K1 SoC
K1 embedded memories
K1 built-in self-repair
K1 redundancy analysis
K1 yield improvement
AB <p><it>Editor's note</it>:</p><p>Built-in-self-repair is an enabling approach for improving memory yield in system-on-chip designs. Reducing the overhead of repair circuits while minimizing the test and repair time is of prime importance. This article presents a fast parallel repair methodology for SoC memory cores and an associated automation framework.</p><p align="right">&#x2014;<it>Swarup Bhunia, Case Western Reserve University</it></p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.121
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.121

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 69
TI Masthead
K1
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.136
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.136

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 70
TI Conference Reports
K1 Conference Reports
AB IEEE Design and Test Conference reports
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.129
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.129

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 72
TI About the power problem
K1 design and test
K1 literature survey
K1 power-aware testing
K1 low power
K1 test strategies
AB <p>This is a review of <it>Power-Aware Testing and Test Strategies for Low Power Devices</it> (Patrick Girard, Nicola Nicolici, and Xiapqing Wen, eds.).</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.122
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.122

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 74
TI CEDA Currents
K1 design and test
K1 ASP-DAC 2011
K1 DATE 2011
K1 EDA
K1 IEEE Embedded Systems Letter
K1 IEEE Fellow
K1 VLSI
AB <p>This month's CEDA Currents newsletter addresses IEEE Fellow nominations; a special session on EDA of contemporary VLSI at ISCAS 2011; the 2010 Computer-Aided Verification Award; the <it>IEEE Embedded Systems Letters'</it> most-accessed articles recently; and upcoming CEDA events.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.128
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.128

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 78
TI Test Technology TC Newsletter
K1 ATE Vision 2020
K1 ATS 2010
K1 D3T-2010
K1 EWDTS 2010
K1 ITC 2010
AB <p>This month's TTTC newsletter features synopses of past events and of upcoming events.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.139
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.139

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 80
TI Are you having fun yet?
A1 Stephen Kosonocky,
K1 design and test
K1 Moore's law
K1 postsilicon repair
K1 scaling
K1 yield
AB <p>Gordon Moore observed, 45 years ago, that the number of components in an IC had doubled every year since the IC's invention in 1958 and predicted this trend would continue. IC scaling has fueled the circuit design industry and the global economy by providing increased processing capabilities at lower costs in each successive technology generation. Somewhere between 65 nm and 45 nm, the industry entered the "More than Moore" realm, defined as adding novel device and packaging technologies to each generation to continue the scaling and performance trend.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.124
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.124

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS
SP 76
TI Design Automation Technical Committee Newsletter
K1 ARCS 2011
K1 design and test
K1 EDA
K1 ICCAD 2010
K1 ISCAS 2011
K1 ISQED 2011
K1 parallel programming
AB <p>This month's DATC newsletter features A Message from the Chair (David Kung), a Message from the Editor (Joe Damore), and upcoming conferences of interest to the DATC community.</p>
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.131
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.131

RT Journal Article
JF IEEE Design & Test of Computers
YR 2010
VO 27
IS 6
SP c2
TI Table of Contents
AB Presents the front cover/table of contents for this issue of the periodical.
PB IEEE Computer Society, [URL:http://www.computer.org]
SN 0740-7475
LA English
DO 10.1109/MDT.2010.133
LK http://doi.ieeecomputersociety.org/10.1109/MDT.2010.133